Yuan, JieFarhat, Nabil HSong, NingVan der Spiegel, Jan2023-05-222023-05-222007-05-012007-06-26https://repository.upenn.edu/handle/20.500.14332/33434Complex spatio-temporal patterns can be clustered using a network of parametrically coupled logistic maps. This paper describes the processing element design of such a Cort-X system. Each Cort-X element consists of a non-linear coupling (LC) and a non-linear dynamic element (IRON). The circuits are designed for low-power operation and to be robust against process variations. This has been accomplished by using openloop circuits, and a self-calibration technique that compensate for process variations. The circuits were implemented in a 0.25 um, 2.5V CMOS process and consumes a total of 12mW of power at 1MHz which is about a factor of 20 less power than previous realizations. This opens the possibility for building a large-scale Cort-X system on a chip for the recognition of complex spatio-temporal patterns.neural networkspatio-temporal patternlogistic maprecognitionnon-linear elementsCort-X II: Low Power Element Design of a Large-Scale Spatio-Temporaral Pattern Clustering SystemPresentation